TUNGA – Technology For Unum-based Next Generation Arithmetic


Slowing down of Moore’s law and rise of Machine Learning and AI have made us to think of alternative technologies that can change computing at grass-root levels. In the constantly changing world of computing environment, the need for acknowledgement and addressing the challenges has become extremely critical, thus the rapidly growing compute industry is strongly looking for alternatives to enhance the modern data centre. Even large CPU Design houses have introduced nonstandard number formats to overcome the shortcomings of IEEE 754 formats.
Transition to Next Generation Arithmetic is in the horizon !
The emerging posit data type (unum type 3)  is proving advantageous in HPC, signal processing, Machine Learning, Big Data, and a broad range of data center applications, since it provides better answers using fewer bits. Lot of research has been done to discover the advantages of Posits and many papers have been published. European Processor Initiative (EPI) has announced that they will be using posit arithmetic in their accelerator boards used for their supercomputer centre design.
CalligoTech has been the pioneer in commercialization of posit arithmetic, both hardware and software, since posits were introduced in 2017. Posit Numeric Unit (PNU) – a Posit-based Co-Processor functionality was demonstrated at Supercomputing Asia. We then integrated our PNU with RISC-V Processor to build and demonstrate world’s first Posit-enabled RISC-V core (CRISP) at RISC-V summit in Switzerland.
Introducing TUNGA – world’s first multi-core RISC-V with Posits !
TUNGA (name of a river in Southern part of India) is an SoC with multiple CRISP-cores built to accelerate HPC and AI workloads with Posit as the fundamental enabling technology for real-number computations. Each core comes with QUIRE – a fixed-point accumulator structure that produces exact dot products guaranteed up to ~2 billion-long vectors (2^31).

Technical Specification

Programmable gates are part of our TUNGA SoC. Pool of FPGA gates is mainly useful to support functions that are on critical path and that require reconfigurable feature in the field. Some of the examples are – Acceleration of specific tasks for datacenter services, Off-load of a wide variety of small tasks from CPU and speed processing, to handle non-standard data types to speed up AI training and inference. Applications such as cryptography, AI, host-CPU support functions for variable precision computing will be implemented on the pool of gates.